Panasonic goes CMOS
- Thread starter William_Robinette
- Start date
Interesting, I'm pretty sure the bitrate is 17, same as HF10. Just from translating those links you get the same record time at high quality as the HF10. I'm intrigued...
LoL this camera has a histogram
http://babelfish.yahoo.com/translat...sd100/useful.html&lp=ja_en&btnTrUrl=Translate
http://babelfish.yahoo.com/translat...sd100/useful.html&lp=ja_en&btnTrUrl=Translate
djembeplay
Well-known member
Lol... you guys crack me up. To me, the real world disadvantages to CMOS seem sooooo small compared to the advantages. We all have our opinions though, just as we all shoot in different ways.
I personally would take the trade-offs of a CMOS over those of a CCD.
Incidentally, what does CMOS stand for? I've known about them for a while now as high-speed motion capture cameras have used them for a long time... but I've never actually known what it means. My only relation to the name is that the battery on a motherboard that keeps the BIOS user data and clock time is called a CMOS I think...
I personally would take the trade-offs of a CMOS over those of a CCD.
Incidentally, what does CMOS stand for? I've known about them for a while now as high-speed motion capture cameras have used them for a long time... but I've never actually known what it means. My only relation to the name is that the battery on a motherboard that keeps the BIOS user data and clock time is called a CMOS I think...
Anhar_Miah
Veteran
Complementory Metal Oxide Semi-Conductor
//edit I should get our more..
//edit I should get our more..
djembeplay
Well-known member
Ha, cool... thanks Anhar.
These high-speed motion capture cameras can record ridiculous frame-rates. It would be fun if someone gave the option to reduce resolution and/or quality and offer frame rates at like 500fps.
Actually, on second look... as a side note... it looks like the high-speed cameras use CCDs as well.
These high-speed motion capture cameras can record ridiculous frame-rates. It would be fun if someone gave the option to reduce resolution and/or quality and offer frame rates at like 500fps.
Actually, on second look... as a side note... it looks like the high-speed cameras use CCDs as well.
kidwoo
Well-known member
Just depends on your use.
To me a small handheld HD camera screams POV shot, or vehicle/cable mount. More often than not, that involves some shaking. When that's the case a rolling shutter is most certainly NOT a small issue. Especially considering the quality of design in a consumer camera. We're not talking about the RED incarnation of CMOS.
If I were mounting the thing to a tripod and never panning quickly, I'd be all over it.
djembeplay
Well-known member
Ya, thats actually what about 95% of my shooting consists of... or very controlled movement. I almost never go handheld and/or mount my camera on something that vibrates, bumps, and shakes.
Of course we all have different shooting styles (I hope), so it's completely subjective. For a person who shoots more controlled (or no) camera movements like myself, the benefits of a CMOS far outweigh it's drawbacks when compared to CCDs... in my opinion.
Jan_Crittenden
Veteran
Not totaly sure, but I believe it to be marketing. It is a CMOS with all of its realities.
If I find out more I will post again, but this is a camera out of the consumer group, they are not counting on people making a living with it.
Best,
Jan
Buck Forester
Well-known member
So Panasonic is hoping to make a killing off those not making a living?
I only jest.
Jan_Crittenden
Veteran
So Panasonic is hoping to make a killing off those not making a living?
Please this is a product released by the consumer company not the broadcast company. Do you realize that there is more than one? If not, let me elucidate. There are 30 companies under the Panasonic Corporation of North America. 17 of those are research labs. Not all, in fact, most are not involved in video at all. The remaining are sales companies. We individually import products and request products from Panasonic Japan for our target markets. As an exaqmple I have been driving the AG-HPX170. The 3MOS camera has been driven by my counterpart in Panasonic Conusmer Electronics. I am sure he/she has weighed in on the demographics to determine the feature set that would be appropriate for their customer base, as I have with the HPX170.
So, Panaosnic Broadcast is concerned about sutomers that wish to make a living with the product. The consumer company is not necessarily concerned, as in my dad is not in this business, but this camera might totally serve his purpose of recording his grandaugthers and his chihuahua. I believe you see the difference.
I trust this explanation will bring an end to the rhetorical remarks?
Thanks,
Best,
Jan
Buck Forester
Well-known member
Jan, sorry if you took my statement wrong... I was really just being goofy and using a play on words, there was no message behind it or anything. Color me silly.
djembeplay
Well-known member
Lol, careful Buck... you're treading on eggshells with this topic. A sense of humor is like like a ray of light in a coal mine on this one.
And I'm not pointing towards you directly, Jan... no harm intended. It just seems silly how worked up we can get over such little things.
One thing that is throwing me is how CCD fans make it sound like a CMOS camera isn't suitable to 'make a living' with as a professional... For instance, Jan's comment saying Panasonic broadcast is concerned about customers who wish to make a living with their camera... Reading between the lines this is saying that CMOS isn't suitable for pro use... It is saying this because of course Panny broadcast uses CCDs only and the product of discussion is a CMOS camera (or 3MOS... not really sure what the difference is here).
I don't know... I mean, you're the expert here, no doubt... but to push CCDs and make CMOS sound like it is inferior to an old tin can seems really stretched to me. I've noticed Barry seems to reference CMOS chips very negatively as well. It just seems out of proportion to me... It seems like CMOS is a means of producing a great image with some drawbacks that people need to be aware of... This seems like a more balanced viewpoint than the strange undertones that come through in a lot of posts that seem intent on convincing others that CMOS isn't comparable to CCDs and have no place professionally... For a while there, when I was more easily influenced, I began to believe that CMOS chips were dug-up artifacts of ancient witch-craft.
And (drum roll) I sense the coming of another curious thread closing in the middle of a good discussion about CMOS vs. CCD... I've seen this happen to a few discussions on this topic... Odd.
And I'm not pointing towards you directly, Jan... no harm intended. It just seems silly how worked up we can get over such little things.
One thing that is throwing me is how CCD fans make it sound like a CMOS camera isn't suitable to 'make a living' with as a professional... For instance, Jan's comment saying Panasonic broadcast is concerned about customers who wish to make a living with their camera... Reading between the lines this is saying that CMOS isn't suitable for pro use... It is saying this because of course Panny broadcast uses CCDs only and the product of discussion is a CMOS camera (or 3MOS... not really sure what the difference is here).
I don't know... I mean, you're the expert here, no doubt... but to push CCDs and make CMOS sound like it is inferior to an old tin can seems really stretched to me. I've noticed Barry seems to reference CMOS chips very negatively as well. It just seems out of proportion to me... It seems like CMOS is a means of producing a great image with some drawbacks that people need to be aware of... This seems like a more balanced viewpoint than the strange undertones that come through in a lot of posts that seem intent on convincing others that CMOS isn't comparable to CCDs and have no place professionally... For a while there, when I was more easily influenced, I began to believe that CMOS chips were dug-up artifacts of ancient witch-craft.
And (drum roll) I sense the coming of another curious thread closing in the middle of a good discussion about CMOS vs. CCD... I've seen this happen to a few discussions on this topic... Odd.
Last edited:
Back to the discussion,:-Happy(DBG):
Find something to explain what the MOS, CMOS, NMOS are........
----------------------------------------------------------------------------------
A MOS transistor is formed by creating two islands of semiconducting material, doped with either negative "N-type" or positive "P-type" charge carriers, in a substrate of the same material doped with charge carriers of the opposite type.
MOS technologies offer a reduction in the large space and high power consumption requirements of bipolar devices. The first MOS electronic circuits employed p-channel (PMOS) devices because they were the easiest to make. As MOS technology advanced, n-channel (NMOS) devices replaced PMOS devices because they offered higher speed performance for the same density, complexity, and cost. The need for reduced power consumption led to the development of the larger but more power efficient complementary MOS (CMOS) devices.
(Complementary Metal Oxide Semiconductor) Pronounced "c-moss." The most widely used integrated circuit design. It is found in almost every electronic product from handheld devices to mainframes. CMOS uses PMOS and NMOS transistors wired together in a balanced fashion that causes less power to be used than NMOS or PMOS transistors by themselves. The first transistors were bipolar, which are still used when higher power is required. CMOS and bipolar are also used in combination for many applications.
A schematic drawing of an N-channel MOS transistor
A CMOS device
---------------------------------------------------------------------------------------------------
In image sensor, the real sensor is photodiode, CCD, CMOS, NMOS are circuits to control the conversion of light to charge, and have different qualities in sensitivity, dynamic range, noise, ......and the exposure method(shutter)
Find something about it: part of a paper published five years ago
---------------------------------------------------------------------
Most CMOS image sensors today use the rolling
shutter approach to control the integration time. This pixel
architecture is advantageous where minimal pixel size is required
to increase resolution or reduce over all chip size. For imaging
of a fast moving object or when used with pulsed illumination,
the rolling shutter approach is not suitable since it leads to
severe distortion.
CMOS pixels with a global shutter have been developed.
The global shutter pixel includes a sample-and-hold
switch with an analog storage in each pixel. Due to the light
exposure of the sample-and-hold stage and the limited sampling
capacitance, shutter leakage, leading to post exposure
or signal loss, has to be addressed in global shutter pixels.
Excellent shutter efficiency of above 99.9% has been obtained
by implementing the sample-and-hold switch in a well separated
from the photodiode .
Due to the increased transistor count and the parasitic capacitances
associated with the additional electronics the optical responsivity
of global shutter pixels is reduced by both, the limited fill factor
and the increased conversion capacitance.
In particular, the use of two separate wells with the large design rules
for well spacing considerably reduces the optical fill factor
when aiming small pixel sizes.
Pixels implementing an NMOS-only
sample-and-hold shutter feature only reduced shutter
efficiency, due to integration of optical generated charges on
the shutter drain diffusion. Though due to more advantageous
design rules when omitting a second well in the pixel, the
optical fill factor and thus the pixel responsivity can be increased.
With this approach pixels of about 10 micrometer and an
optical fill factor above 30% have been presented in 0.5- micrometer
technology, preserving a shutter efficiency of 99% . This
shutter efficiency is still acceptable for most applications but
the responsivity of a global shutter pixel is unsatisfying since
the additional capacitance connected to the photodiode reduces
considerably the voltage gain per electron.
The use of a PMOS only pixel and the vertical pnp transistor built
by the p photodiode, the NWELL and the underlying substrate improves
the shutter efficiency and the fill factor but the responsivity
remains poor due to the limited quantum efficiency of such
a photodiode structure.
The use of a photogate-type pixel significantly improves the responsivity,
but the reported shutter efficiency of approximately 95% is rather low
for some applications and the quantum efficiency of photogate pixels at
short wavelengths is usually low.
This paper presents a pixel where the sample-and-hold
transistor is used during integration to decouple the parasitic
capacitance of the photodiode from the conversion capacitance.
The decoupling is realized by biasing the sample-and-hold
transistor in subthreshold operation during integration
The responsivity obtained with this approach can even be higher
than the one obtained with three transistor rolling shutter pixels
and therefore is not only beneficial for applications demanding
global shutter image sensors.
CONCLUSION
An NMOS-only implementation of a pixel with global shutter
has been presented. An excellent shutter efficiency of 99.5%
has been measured. The optical fill factor of 35% is reasonable
for a pixel of 10.5 micrometer in a 0.5-micrometer technology.
The skimming technology based on the subthreshold operation of the
shutter transistor has shown a improvement of the conversion
gain of a factor 5, leading to a sensor with excellent responsivity,
comparable with CCD sensors
Find something to explain what the MOS, CMOS, NMOS are........
----------------------------------------------------------------------------------
A MOS transistor is formed by creating two islands of semiconducting material, doped with either negative "N-type" or positive "P-type" charge carriers, in a substrate of the same material doped with charge carriers of the opposite type.
MOS technologies offer a reduction in the large space and high power consumption requirements of bipolar devices. The first MOS electronic circuits employed p-channel (PMOS) devices because they were the easiest to make. As MOS technology advanced, n-channel (NMOS) devices replaced PMOS devices because they offered higher speed performance for the same density, complexity, and cost. The need for reduced power consumption led to the development of the larger but more power efficient complementary MOS (CMOS) devices.
(Complementary Metal Oxide Semiconductor) Pronounced "c-moss." The most widely used integrated circuit design. It is found in almost every electronic product from handheld devices to mainframes. CMOS uses PMOS and NMOS transistors wired together in a balanced fashion that causes less power to be used than NMOS or PMOS transistors by themselves. The first transistors were bipolar, which are still used when higher power is required. CMOS and bipolar are also used in combination for many applications.
A schematic drawing of an N-channel MOS transistor
A CMOS device
---------------------------------------------------------------------------------------------------
In image sensor, the real sensor is photodiode, CCD, CMOS, NMOS are circuits to control the conversion of light to charge, and have different qualities in sensitivity, dynamic range, noise, ......and the exposure method(shutter)
Find something about it: part of a paper published five years ago
---------------------------------------------------------------------
Most CMOS image sensors today use the rolling
shutter approach to control the integration time. This pixel
architecture is advantageous where minimal pixel size is required
to increase resolution or reduce over all chip size. For imaging
of a fast moving object or when used with pulsed illumination,
the rolling shutter approach is not suitable since it leads to
severe distortion.
CMOS pixels with a global shutter have been developed.
The global shutter pixel includes a sample-and-hold
switch with an analog storage in each pixel. Due to the light
exposure of the sample-and-hold stage and the limited sampling
capacitance, shutter leakage, leading to post exposure
or signal loss, has to be addressed in global shutter pixels.
Excellent shutter efficiency of above 99.9% has been obtained
by implementing the sample-and-hold switch in a well separated
from the photodiode .
Due to the increased transistor count and the parasitic capacitances
associated with the additional electronics the optical responsivity
of global shutter pixels is reduced by both, the limited fill factor
and the increased conversion capacitance.
In particular, the use of two separate wells with the large design rules
for well spacing considerably reduces the optical fill factor
when aiming small pixel sizes.
Pixels implementing an NMOS-only
sample-and-hold shutter feature only reduced shutter
efficiency, due to integration of optical generated charges on
the shutter drain diffusion. Though due to more advantageous
design rules when omitting a second well in the pixel, the
optical fill factor and thus the pixel responsivity can be increased.
With this approach pixels of about 10 micrometer and an
optical fill factor above 30% have been presented in 0.5- micrometer
technology, preserving a shutter efficiency of 99% . This
shutter efficiency is still acceptable for most applications but
the responsivity of a global shutter pixel is unsatisfying since
the additional capacitance connected to the photodiode reduces
considerably the voltage gain per electron.
The use of a PMOS only pixel and the vertical pnp transistor built
by the p photodiode, the NWELL and the underlying substrate improves
the shutter efficiency and the fill factor but the responsivity
remains poor due to the limited quantum efficiency of such
a photodiode structure.
The use of a photogate-type pixel significantly improves the responsivity,
but the reported shutter efficiency of approximately 95% is rather low
for some applications and the quantum efficiency of photogate pixels at
short wavelengths is usually low.
This paper presents a pixel where the sample-and-hold
transistor is used during integration to decouple the parasitic
capacitance of the photodiode from the conversion capacitance.
The decoupling is realized by biasing the sample-and-hold
transistor in subthreshold operation during integration
The responsivity obtained with this approach can even be higher
than the one obtained with three transistor rolling shutter pixels
and therefore is not only beneficial for applications demanding
global shutter image sensors.
CONCLUSION
An NMOS-only implementation of a pixel with global shutter
has been presented. An excellent shutter efficiency of 99.5%
has been measured. The optical fill factor of 35% is reasonable
for a pixel of 10.5 micrometer in a 0.5-micrometer technology.
The skimming technology based on the subthreshold operation of the
shutter transistor has shown a improvement of the conversion
gain of a factor 5, leading to a sensor with excellent responsivity,
comparable with CCD sensors