Sony A7SIII = $3500, 10-bit 4K120p internal, 16-bit 4K60p RAW out

Then again, I'm reading that the S1H probably uses temporal noise reduction in the modes tested by cinema5d. So maybe it's fair to compare the numbers. But my that noise floor looks clean (granted that the photosites are huge):

Screenshot_20200811-182618_YouTube.jpg
 
Then again, I'm reading that the S1H probably uses temporal noise reduction in the modes tested by cinema5d. So maybe it's fair to compare the numbers. But my that noise floor looks clean (granted that the photosites are huge):

This shows how much NR is going on internally.

adPZHtQ.jpg
 
Yeah - judging by the listed readout speeds at various bit-depths and the fact that the A7SIII has the same super-fast rolling shutter at every framerate, I think the readout is 12-bit at every framerate.

Check out the amazing editing of this promo video:


I do feel like caucasian skin looks a bit lackluster there though...
 
The speculation leading up to the announcement was that the A7S III would use the Sony IMX312AQK image sensor. That sensor can do a 14-bit readout up to 43 fps or a 12-bit readout up to 144 fps in video mode:

dc7bcdfb374020517236e066ffc0f0695a54067a1e22271cdd7494bb4c9fec0d-Kopie.jpg

People surmised that the WW271448 model number referenced in the spec sheet (which refers to a camera that Sony registered for wi-fi certification testing a few months back) is actually the A7S III which would explain why the camera doesn't actually support 48-megapixel Quad Bayer readout mode, but only supports the 12-megapixel readout instead.

I'm not sure whether it was ever officially confirmed whether this is the sensor used in the camera though. It's pretty rare to get any official information on sensor internals from camera companies, so we often only find out when someone does a tear-down of the camera.
 
I'm not sure that's the A7SIII sensor because I don't think the A7SIII sensor is stacked.

Also - afaik - the a7siii has matching rolling shutter speed in 30p and 60p indicating the same bit-depth ADC is used.

Maybe if you go RAW out maybe it will do a higher bit-depth readout. I sort of doubt it
 
I'm not sure that's the A7SIII sensor because I don't think the A7SIII sensor is stacked.

Also - afaik - the a7siii has matching rolling shutter speed in 30p and 60p indicating the same bit-depth ADC is used.

Maybe if you go RAW out maybe it will do a higher bit-depth readout. I sort of doubt it
Yes, as I mentioned it's hard to know for sure what sensor is being used. Although they could be using the 12-bit readout mode for all video captured to improve rolling shutter performance, even though the sensor is capable of 14-bit readout up to 40 fps.

And the question is, if the WW271448 camera that was registered is not the a7S III, what other full-frame camera does Sony have coming out that would use such a sensor and limit its readout to 12 megapixels?
https://photorumors.com/2020/06/05/the-upcoming-sony-ww271448-camera-will-have-bluetooth-5-0/
 
Yeah - judging by the listed readout speeds at various bit-depths and the fact that the A7SIII has the same super-fast rolling shutter at every framerate, I think the readout is 12-bit at every framerate.

It's not possible that Gerald Undone's waveform would have shown 14 discrete steps if the ADC was only reading out 12 of them. The wfm is only capable of showing what there is digital data for; you can't split 1 code value into multiple shades, and 1 code value is all that's available for the 14th stop with 14 bit. The only possibility would have been if the steps on the wfm were not full light stops, but that problem is avoided by using the backlit xyla chart, it saves you from introducing counting errors by stopping down the lens or shutter. Yes, you can fit more stops into 12 bit log but you never have more than than the ADC, the ADC is always more. You're not saving bandwidth either, the ADC is read out in the complete word length in one or two clock cycles of the processor. I did micro controller circuit board design with A/D's and D/A's in another lifetime, where 1 micro sec/instruction was the execution time for 1 line of machine code, and entire assembly language instruction set was 35-40 instructions, each instruction was executed in 1 or 2 clock cycles. Much much faster now. In other words, bit depth is word length; always read out in parallel not sequential. In PCs, the bi-directional bus had reached a speed limit, the interconnect design was changed to PCI Express, a serial protocol with lower pin count, so that may have changed things from when I was working with stone tools but doesn't seem like there would be any economies from 12 bit readout.
 
It's not possible that Gerald Undone's waveform would have shown 14 discrete steps if the ADC was only reading out 12 of them. The wfm is only capable of showing what there is digital data for; you can't split 1 code value into multiple shades, and 1 code value is all that's available for the 14th stop with 14 bit. The only possibility would have been if the steps on the wfm were not full light stops, but that problem is avoided by using the backlit xyla chart, it saves you from introducing counting errors by stopping down the lens or shutter. Yes, you can fit more stops into 12 bit log but you never have more than than the ADC, the ADC is always more. You're not saving bandwidth either, the ADC is read out in the complete word length in one or two clock cycles of the processor. I did micro controller circuit board design with A/D's and D/A's in another lifetime, where 1 micro sec/instruction was the execution time for 1 line of machine code, and entire assembly language instruction set was 35-40 instructions, each instruction was executed in 1 or 2 clock cycles. Much much faster now. In other words, bit depth is word length; always read out in parallel not sequential. In PCs, the bi-directional bus had reached a speed limit, the interconnect design was changed to PCI Express, a serial protocol with lower pin count, so that may have changed things from when I was working with stone tools but doesn't seem like there would be any economies from 12 bit readout.

ADC bitdepth is merely quantisation accuracy, it does not cut off any photographic info contained in the scene

There are cameras that allows the user to switch between 12bit and 14bit for stills, if you compare stills shot using these two bitdepth in the same scene, you'll see they show exactly the same amount of detail, it's just the 12bit one will be noisier in the deep shadow.
 
The speculation leading up to the announcement was that the A7S III would use the Sony IMX312AQK image sensor. That sensor can do a 14-bit readout up to 43 fps or a 12-bit readout up to 144 fps in video mode:

View attachment 140040

People surmised that the WW271448 model number referenced in the spec sheet (which refers to a camera that Sony registered for wi-fi certification testing a few months back) is actually the A7S III which would explain why the camera doesn't actually support 48-megapixel Quad Bayer readout mode, but only supports the 12-megapixel readout instead.

I'm not sure whether it was ever officially confirmed whether this is the sensor used in the camera though. It's pretty rare to get any official information on sensor internals from camera companies, so we often only find out when someone does a tear-down of the camera.

This looks very plausible. +1^
 
I'm not sure that spec sheet is legit. It could be. But it surfaced on a rumors site during the lead-up to launch.

Here are the tested readout speeds from dpreview:

Screenshot_20200812-133240_Chrome.jpg

The 120fps readout speed is a bit too slow to be capable of the max 144.8fps readout mentioned in the spec sheet.

And the readout speeds for 120fps and 24fps are so similar that I can't believe they could be from different bit-depth ADCs (based on the comparative readout speeds from different bit-depth ADCs on published sensor data sheets).

The 1DXmk3, for example, has markedly slower rolling shutter in 30fps and below compared to 60fps.

Maybe the A7SIII will use its 14-bit ADC for RAW out. But for the internal recording, I can't say for sure but it seems possible that it's a 12-bit readout
 
So it is 16 bit A/D, 12 bit readout in 4k video, quantized, gamma encoded to 14 noisy stops DR, except it's clean so temporal NR. Does it make sense that's easier than just recording 14 bits without the processing? It's going to be a disappointment for raw recording.
 
I don't follow. The 16-bit ADC is not used during a 12-bit readout, right?

What about easier to record than 14 bits without processing?

What about a disappointment for RAW recording? I dont get your meaning
 
It's simply 12bit ADC in all video mode.

14bit ADC cannot reach video framerate, let alone 16bit which is just barely double digit frame rate. Then there's power consumption and heat to consider.
 
Maybe the A7SIII will use its 14-bit ADC for RAW out. But for the internal recording, I can't say for sure but it seems possible that it's a 12-bit readout

Sheet says it's capable of 14 bit output @44.2 in still picture mode, 12 bit to 144.8 in video. Doesn't specify video bit depth at < 44.2 FPS. It looks like we're still faced with assumptions unless a deeper dive into spec sheet.
 
It's simply 12bit ADC in all video mode.

14bit ADC cannot reach video framerate, let alone 16bit which is just barely double digit frame rate. Then there's power consumption and heat to consider.

I think this is probably true. Here are some of the readout modes from the published A7III sensor sheet:

Screenshot_20200812-140233_Drive.jpg

14-bit readout is about 19.2 fps. Maybe the A7SIII can do better with lower resolution and faster hardware. But I dont think it could do 3-5x better. We should be seeing horrible rolling shutter in 24fps if it were using 14-bit ADC, no?
 
I don't follow. The 16-bit ADC is not used during a 12-bit readout, right?


What about a disappointment for RAW recording? I dont get your meaning

Yes, actual 16 bit A/D device utilizing only 12 significant bits.

It means that if Gerald got his 14 stops from such 12 bit readout, 13th and 14th stops were interpolated, not real. But they looked good to him, you have to assume either 12 bit is not correct or if it is, give credit for in-camera processing of gamma and NR, which you won't get with linear raw if that too were only 12 bit readout.

What about easier to record than 14 bits without processing?

Direct writing of 14 bit words to memory is faster than DSP processing of 12 bits for gamma and temporal NR, but for video you have to have this anyway, and the additional overhead of XAVC compression which could account for the RS speeds you noted from DP Review.
 
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