New sony imagining sensor

Greg_E said:
not exactly a video/cinema production sensor, but the technology could be worked into the kinds of cameras we might use
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It could also be crap for dynamic range and color, so who knows if this would be usable for photography or video.
 
Well consider this... After reading about the layers of circuits under the photosites to be able to process the information this fast and all on a single chip, I don't care if it is monochrome with limited DR. What I care about is how this will allow them to make better imagers. Everything we have in CCD and CMOS imagining started life as a lowly industrial machine vision and inspection sensor back in the 90's or slightly earlier. That's the root of our whole pipeline when you go back to the real beginning. Little steps like this eventually work their way into top of the line motion cameras. This is why I'm excited by this lowly inspection system imager. I don't think anyone here would say there is no need for growth in DR, scanning rate, lack of jello, and color bit depth. Higher frames rates for some are just as important. Getting global shutter with high DR and high frame rates is what this chip may lead directly toward. And that being the ability to pack the A to D, buffer, and data pipeline all into the same die with a data controller to produce the serial or parallel data output needed for the image processor. In as little as two years a similar design could be in the next CineAlta camera.
 
Or actually two years ago, since the RX100 IV sensor also has a lot of circuitry on its back, including signal processor and DRAM, but still not things like object tracking. Sony has a huge edge on its competitors right now in terms of stacked sensors, it seems like they'll put more and more stuff into them in the near future.
 
And stacked sensor (in my opinion) is the better way to handle a global shutter. But I think it is probably the most expensive way to do it too, and heat is also a side effect that needs to be cured. Can't forget that the greater the number of transistors in a die, the greater the heat output. Only really an issue when you try to put IBIS together with the stacked imager. Thankfully the smaller and smaller process on the silicon wafer is reducing the waste heat, but still something that needs to be considered.
 
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