HVX200 guts and partial teardown

[cyphunk]

Here in are some pictures of the RAID/P2 board and two ports that you will find just under the battery. The latter is exposed without any intrusion to the case so I am really curious what this is for, anyone know?

Pictures show:
* ports behind battery
* Pictures of P2 (RAID?) controller

Also, im running into several chips for which I cannot find any documentation. For instance, the Toshiba chip pictured in the 3rd image below. Anyone have clues?

To recap the goals:
I'm working on a few objectives in reverse engineering of the HVX200 at the moment.
1. provide support for generic USB or firewire disks.
2. Provide information on P2 cards (which appear to be generic SD+RAID derivers over PCMCIA actually) to be able to build drivers in linux.
3. Explore swapping chips on P2 cards to increase storage.

In the process my first objective is to get some way to debug and explore the system. I already have one clear route which is that I can make a script to execute and print info either to the LCD or save it to a SD card. I'm still looking for something like a console for more interactive exploration. It appears their might be drivers onboard for a PCMCIA network card.

I think i will spend a little more time going over the internals to see if i find something that will help in debugging. Otherwise, its back to the software and drivers. First and foremost ordering the PCMCIA network or console cards that they have left the drivers in for.

I will post updates to http://deadhacker.com and here when I have them.

[mikkowilson]

A couple of test-points on those boards aren't there...


FYI: The RAID controllers are within the P2 cards themselves.

- Mikko

[cyphunk]

A couple of test-points on those boards aren't there...

What do you mean by that? Can you be more verbose? thanks


FYI: The RAID controllers are within the P2 cards themselves.

True indeed.

thanks

[mikkowilson]

What do you mean by that? Can you be more verbose? thanks

Those solder pads on the boards labeled "TP" are "Test Points" - key points in the circuitry of the system where you can hook up various test equipment to "tap into" various signals in the system.

What each test point is for, and what type of signal is (or should be) present at each one will all be listed in a maintenance manual or similar document somewhere.

- Mikko

[cyphunk]

aah gotchya. yeah i was looking for such markings but didnt find any. there are tons of markings though so i probably need to spend more time

[cyphunk]

well, yes, i redact my last statement. there are hundreds of TP, test points. The issue is that there are no markings that differentiate them or indicate their purpose. I can determine the purpose partially through an electrical test but due to the mass of TP's i imagine many will match common purposes. The other task that might help is to properly map what the purpose and features of various chips and hence each board is. Then I can narrow the TP purpose either by the board it is on or by mapping it to a pin on the chip. The issue I have is that the very first Toshiba chip I tried to find documentation for failed. I havent tried others yet due to time.

[Steve Eisen]

Watch out for a patent lawsuit.

[cyphunk]

Watch out for a patent lawsuit.

Where do you think that applies here? A lot of the code in the camera is GPL, especially the code that interests me for building P2 support, USB hard disk support and other objectives. Hardware analysis is just an additional means to understand how the software is segmented and what controls what. Everything gets more grey when it comes to trying to add cross platform support. I would argue im adding benefit to their product. But I dont know how they would see it. I'm not hard to find by any means should they want to chat about it.